Students pursuing research in field of VLSI Design |
Full Time Students |
| S.No. | Student | Research Topic | Institution Name |
1
| Harish Anand Thiru Kumareshan | Enhanced Digital Devices with Computational Logics | Anna University, Chennai |
2
| Bhaskar Chinnaiah | Speech Synthesis using FPGA | Anna University, Chennai |
3
| Sarabjeet Kaur | Analytical Modeling and Performance Improvement of Tunnel Field Effect Transistor | Dr B R Ambedkar National Institute of Technology, Jalandhar |
4
| Khokan Mondal | Performance analysis of deep sub micron level on-chip interconnect | Indian Institute of Engineering Science and Technology, Shibpur |
5
| Anindita Chakraborty | Memristor-based Implementation of Logic Primitives and Slicing Architecture for Fast Computation. | Indian Institute of Engineering Science and Technology, Shibpur |
6
| SUPRIYO SRIMANI | ANALOG AND MIXED SIGNAL TESTING | Indian Institute of Engineering Science and Technology, Shibpur |
7
| Abhijeet Pathak | Low Power High Speed Comparator design for Analog to Digital Converter | Indian Institute of Information Technology, Design and Manufacturing, Jabalpur |
8
| Khanjan Changmai Baruah | Applicant and Algorithm on NVM Technology | Indian Institute of Information Technology, Guwahati |
9
| Vanjari Sai Charan | InAlN/GaN HEMTs on Silicon for mm-wave applications | Indian Institute of Science, Bangalore |
10
| Sandeep Vura | Epitaxial Integration of oxides on silicon | Indian Institute of Science, Bangalore |
11
| SANDEEP KUMAR | III-Nitride transistors (fabrication, characterization), dielectric/GaN interface, novel materials and devices | Indian Institute of Science, Bangalore |
12
| Prince Kumar Singh | Modeling and Simulation of Advanced CMOS Devices | Indian Institute of Technology (BHU), Varanasi |
13
| Makarand Mukund Kane | Exploring Wire-EDM as a Better Alternative to Manufacture Solar Wafers for Photovoltaic Applications | Indian Institute of Technology, Bombay |
14
| Rohini Vasant Gulve | Power estimation and test strategies of VLSI circuits and SoCs under various delay models | Indian Institute of Technology, Bombay |
15
| Narendra Suresh Rai | Device simulation and modeling | Indian Institute of Technology, Bombay |
16
| Anshul Gupta | RELIABILITY OF SEMICONDUCTOR DEVICES | Indian Institute of Technology, Delhi |
17
| Neelam Surana | Design of Digital Circuits for the Space Applications | Indian Institute of Technology, Gandhinagar |
18
| Ganeriwala Mohit Dineshkumar | Analysis and Modeling of Multigate III-V Semiconductor Devices | Indian Institute of Technology, Gandhinagar |
19
| Chandan Kumar Jha | Low Power VLSI Designs | Indian Institute of Technology, Gandhinagar |
20
| MANORANJAN MINZ | Hybrid Multiplexing Schemes on Silicon Photonics Platform | Indian Institute of Technology, Guwahati |
21
| Sushree Sila Panigrahy | Security enabled architecture for IOT applications | Indian Institute of Technology, Guwahati |
22
| Darpan Mishra | Designing a high speed optical modulator in silicon photonics platform | Indian Institute of Technology, Guwahati |
23
| Venkateshwarlu Yellaswamy Gudur | Hardware Acceleration in Proteomics for Healthcare | Indian Institute of Technology, Hyderabad |
24
| D Santhosh Reddy | Low Power VLSI Architecture for IoT enabled Ultrasound | Indian Institute of Technology, Hyderabad |
25
| G Sri Harsavardan | High Performance Sub-10 GHz wideband Receiver Frontends in nm-CMOS | Indian Institute of Technology, Hyderabad |
26
| Rizwan Shaik Peerla | A Robust Wideband Fractional N PLL which is CMOS compatible within the S-Band range of frequencies | Indian Institute of Technology, Hyderabad |
27
| Deepak Kachave | SECURITY AWARE HIGH LEVEL SYNTHESIS FOR DIGITAL IC DESIGN | Indian Institute of Technology, Indore |
28
| Adarsh Nigam | Design and fabrication of AlGaN/GaN HEMT on Si Substrate | Indian Institute of Technology, Jodhpur |
29
| Sangha Mitra | Flexible Batteries | Indian Institute of Technology, Kanpur |
30
| Gaganjot Singh | Flexible Electronics | Indian Institute of Technology, Kanpur |
31
| Sudipta Bose | Signal Processing Algorithm and Architecture | Indian Institute of Technology, Kharagpur |
32
| Ashish Shirish Joshi | Analog and Mixed Signal Circuit Design | Indian Institute of Technology, Mandi |
33
| SNEHA KUMARI | Silicon Photonics and its Application in Communication and Computation | Indian Institute of Technology, Patna |
34
| Satyam Shukla | Low Power Processor Design | Indian Institute of Technology, Patna |
35
| SAURABH KUMAR | Frequency Synthesizer | Indian Institute of Technology, Patna |
36
| Amit Kumar | PERFORMANCE MODELING AND ANALYSIS OF GRAPHENE-BASED ON-CHIP VLSI INTERCONNECTS | Indian Institute of Technology, Roorkee |
37
| Sudhir Kumar Saini | Fabrication and optical studies of subwavelength photonics nanostructures | Indian Institute of Technology, Ropar |
38
| Akshay Jain | Efficient architectures for Vision Algorithms on FPGAs | Indraprastha Institute of Information Technology, Delhi |
39
| MANPREET KAUR JASWAL | Design and analysis of an Efficient FPGA-Based Profiling Tool to aid Hardware/Software Partitioning for Reconfigurable Embedded System Applications | International Institute of Information Technology, Bangalore |
40
| Padma Surya | Error correction Algorithm implementation for Pipelined ADCs | International Institute of Information Technology, Bangalore |
41
| Priyanka Saha | Analytical Modeling and Simulation of Low Dimensional Devices with Improved Performance | Jadavpur University, Kolkata |
42
| Ahmad Khusro | Gallium Nitride (GaN) Device Modeling for Broad-band Power Amplifiers | Jamia Millia Islamia, Delhi |
43
| VINOD KUMARI | Resilient & Reliable Reconfigurable Hardware Design for space & terrestrial applications | Malaviya National Institute of Technology, Jaipur |
44
| Trapti Sharma | Design of VLSI circuits using Nano scaled Devices | Maulana Azad National Insitute of Technology, Bhopal |
45
| Yashu Swami | 1. To model a Novel Enhanced Threshold Voltage Extraction Method at nano-level technology node autonomous of Noise, Leakage and Short Channel Effects. 2. A novel approach to model the I-V characterist | Motilal Nehru National Institute of Technology, Allahabad |
46
| Pratosh Kumar Pal | Design and Analysis of sub 1-V Voltage Reference Circuits for Data Converter Applications in Low Power VLSI Systems and design of DACs usign this sub-1V voltage reference circuit. | Motilal Nehru National Institute of Technology, Allahabad |
47
| Pritam Bhattacharjee | Embedding of Variable Frequency Clock and Clock Gating to Mitigate Power Supply Noise in Silicon Chip | National Institute of Technology, Arunachal Pradesh |
48
| Suchandra Banerjee | Floorplanning and Placement in VLSI Circuits | National Institute of Technology, Durgapur |
49
| Vivek Sharma | Low power data converter | National Institute of Technology, Goa |
50
| Karri Manikantta Reddy | Approximate Circuits Design for Error Resilient Applications | National Institute of Technology, Goa |
51
| Shalu | Modeling and Analysis of Gaussian Channel Junctionless FinFET for SRAM application | National Institute of Technology, Hamirpur |
52
| Polineni Sreenivasulu | Design of energy efficient data converters | National Institute of Technology, Karnataka, Surathkal |
53
| Shara Mathew | modelling hetero dielectric dual material gate tunnel FETs | National Institute of Technology, Karnataka, Surathkal |
54
| Hanumantha Rao Gottam | LOW VOLTAGE, LOW FREQUENCY CONTINUOUS TIME FILTERS | National Institute of Technology, Karnataka, Surathkal |
55
| Phrangboklang Lyngton Thangkhiew | Memristor Based Logic Design | National Institute of Technology, Meghalaya |
56
| Farhana Begum | Low Power VLSI | National Institute of Technology, Meghalaya |
57
| Rekib Uddin Ahmed | Performance Parameter Optimization of Arithmetic Circuits based on Multi-Gate Nanoscale CMOS | National Institute of Technology, Meghalaya |
58
| Chinnapurapu Naga Raghuram | Design and Analysis of Radiation Hardened Memory | National Institute of Technology, Patna |
59
| Rajesh Saha | Statistical Simulation and Analytical Modeling of FinFET | National Institute of Technology, Silchar |
60
| Shathanaa Rajmohan | Design Space Exploration for Architectural Synthesis | National Institute of Technology, Tiruchirappalli |
61
| Manjunatheshwara K J | Development of sustainable electronics products through application of techniques in material, product and process orientations | National Institute of Technology, Tiruchirappalli |
62
| Raja Sekar K | Digital VLSI Architecture | National Institute of Technology, Tiruchirappalli |
63
| J KOKILA | Reliability and hardware security Issues in System on chip Design | National Institute of Technology, Tiruchirappalli |
64
| Ningombam Ajit Kumar | Modeling And Simulation Of Silicon On Insulator (SOI) And Silicon On Nothing (SON) MOSFET | North Eastern Regional Institute of Science and Technology, Arunachal Pradesh |
65
| Sarfraz Hussain | Design of an Efficient ADC for low power and high speed applications | North Eastern Regional Institute of Science and Technology, Arunachal Pradesh |
66
| Mudavath Raju | Performance Analysis and Enhancement of Signal and Power Integrity for High Speed PCB Design | Osmania University, Hyderabad |
67
| K V Gowreesrinivas | DESIGN AND IMPLEMENTATION OF SINGLE AND DOUBLE PRECISION FLOATING POINT MULTIPLICATION FOR DIGITAL SIGNAL PROCESSING APPLICATIONS | Pondicherry University, Puducherry |
68
| Ajay Kumar | Lightweight Cryptographic Algorithms and their Hardware Architectures | Thapar University, Patiala |
Part Time Students |
| S.No. | Student | Research Topic | Institution Name |
1
| Nitin Kumar | Design Considerations and Performance Evaluation of CMOS Low Power PLL Circuits | Guru Gobind Singh Indraprastha University, Delhi |
2
| Priyank Kumar Saxena | Analytical Modelling, Simulation and characterization of junctionless MOSFET for circuit applications
| Guru Gobind Singh Indraprastha University, Delhi |
3
| Mr Patel Dharmendrakumar Bhagabhai | Design and Development of Radiation Hardened Non Volatile Memory | Institute of Technology, Nirma University, Ahmedabad |
4
| Dipesh Jashvantbhai Panchal | Low Power Low Noise Automatic Gain Control Amplifier for Biomedical Applications | Institute of Technology, Nirma University, Ahmedabad |
5
| Deepak Kumar Mittal | Prognostic Health Management of Avionic Systems | International Institute of Information Technology, Hyderabad |
6
| Rajesh M | | International Institute of Information Technology, Hyderabad |
7
| Aneesh K | Low Power Technologies and Techniques for Energy efficiency in Portable Devices | Karunya Institute of Technology and Sciences, Coimbatore |
8
| Deepak Gupta | Study,Analysis and Design of Signal Conditioning Circuits for Biomedical Applications | Malaviya National Institute of Technology, Jaipur |
9
| KOEL DATTA PURKAYASTHA | Design a low power and low storage air quality monitoring system to measure air pollutants based on wireless sensor network for low cost requirement. | National Institute of Technology, Agartala |
10
| Vivek Kumar Singh | Some Strategies for Power reduction of VLSI Circuits. | National Institute of Technology, Agartala |
11
| Sudeshna Kundu (Mondal) | SAT Based Rectilinear Steiner Tree Construction and its Applications in Global Routing | National Institute of Technology, Durgapur |
12
| P. R. Sreesh | An optimized low power VLSI hardware architecture for implementation of speech and emotion recognition systems on FPGA | National Institute of Technology, Puducherry |
13
| Gourab Ghanty | Design and Optimization of VLSI Circuit | National Institute of Technology, Silchar |
14
| Ms Aruna Kokkula | System On Chip design for Secure Image Processing | Osmania University, Hyderabad |
